Traineeship

LXPU – LuxProvide Processing Unit

Traineeship details

About the hosting organisation

Host institute / company

LuxProvide

Country

Sector(s)

HPC Centre / Supercomputing Facility

Duration and availability

Duration

5 months

Earliest start date

01/11/2026

About the traineeship

Traineeship name

LXPU - LuxProvide Processing Unit

Proposal ID

HPCTRAIN-OFFER-202601-017

Thematic area(s)

The main topic is processor design, fit to market. The secondary topic is software/hardware co-design. The processor targeted is a CPU, for HPC environment (providing scalability through parallelism, and not AI specific). Developing European HPC capability requires developing core components, such as a processor.

Name of the position

System Architect.

About the position

The trainee is expected to perform a wide range of activities, all contributing to the high-level design of a processor destined for HPC centers. While the project is ambitious, the trainee needs only to contribute to several aspects, by collecting information and developing an understanding of the problem. The trainee will also be supported by the supervisor and eventually other team members. The activities include: market research, survey technological landscape, draft high-level requirements, propose a design (or a design approach, preferably automatic) and if possible, prototype the design on LuxProvide's FPGA boards. The trainee could consider this role as a "CTO" for a hypothetical startup, and not a researcher role.

Minimum qualification level

The trainee will be given clear directions, yet will have much autonomy, therefore some maturity and courage are necessary. The trainee must have a broad knowledge of computing, even if superficial, and yet be able to dive deeper on occasion (semiconductor fabrication-induced constraints, processor design, instruction set, automated search algorithms to explore the design space, FPGA programming). He/she does not need to know everything from the beginning. Any initial technical knowledge helps (such as lower-level programming, or processor design), but product design and market fit are also needed, and will in fact be useful at first.

Learning objectives

The trainee will greatly benefit from this ambitious traineeship, by understanding how a European/Luxembourgish processor could be built today. Why isn't there a CPU today? What is needed to reach an MVP? What are the key design questions, considering the HPC target environment? Depending on the course of the traineeship, and the interest of the trainee, some aspects may be more researched than others (prototyping a CPU on FPGA, specifying the CPU, exploring the market...). Finally, some general innovation method will be useful, such as automated search in a design space, and more general methods such as "thinking inside the box"). As a side note, the mentor also looks forward to learn from the investigation of the traineeship.

Tools and technologies to be used

Non-technical activities will require: - marketing-like skills (product design, market fit...) - communication skills, when contacting key actors in Europe Technical skills will require: - computer architecture - software interface (ISA...) - search algorithms for design space - FPGA programming for the prototype.

View the HPCTRAIN call for trainees call text

Description

“People who are really serious about software should make their own hardware." A.Kay. The general objective of the traineeship is to investigate how could a processor be designed, produced and programmed right now and in Europe. The work will be carried out in close collaboration with the mentor. The first step is to understand what the situation is regarding processors in Europe today: manufacturing capability, market forces, active organisations, obstacles. The second step is to understand and expose the design space for a CPU. The third step is to specify, implement and test a prototype (no matter how simple). A systematic approach to designing can be expressed as a search (with evaluation) in the CPU design space, and can be implemented on LuxProvide's HPC, Meluxina. The software/hardware co-design comes from the need to compensate the expected low CPU performance with parallelism and a fast software support.

Submit your proposal

Please find more details on how to apply below.

Go to application portal